3D Interconnect Project
‘The Deposition of Fine-Pitch Electronic Connections over Non-Planar Surfaces and Within Volumes'
A Purvis(1), S Johnson(1), A Maiden(1), R McWilliam(1), N Seed(2), G Williams(2), P Ivey(3)
(1) Durham University, (2) University of Sheffield, (3) Innotec Ltd.
The objective of the 3D Interconnect (3DI) project is to realise the photolithographic patterning of fine-line interconnections onto grossly non-planar surfaces. This is a collaborative project between the School of Engineering at Durham and the department of Electrical and Electronic Engineering at the University of Sheffield.
An overview of the 3D holographic lithography research at the School of Engineering and Computing Sciences.
A major challenge for the electronic packaging industry is a rapidly growing need for high density chip-to-chip and wafer-to-wafer interconnects. Packging methods such as System in a Package (SiP), wafer level packaging and general 3-dimensional packaging require methods for fabricating non-planar interconnects at both the wafer level and chip level. The latest ITRS  identifies 3-dimensional interconnect as a key manufacturing challenge for next generation chip packaging.
In conventional photolithography a mask is aligned to a planar substrate any exposed to UV radiation. If the gap between mask and substrate were increased, diffraction causes features projected on the substrate to broaden and eventually distort such that integrity of the original image is lost (fig.1).
Where λ is the wavelength of light using for exposure, Z is the mask-substrate separation, x,y are the coordinates on the mask, xo,yo are the centre coordinates of the line and b,l define the size of the hologram.
CGH masks are computed by performing optical transforms on the required three dimensional geometry which results in a matrix of complex values that represent the hologram design (fig 2). We employ a variety of methods for amplitude/phase quantisation and encoding to render the mask data suitable for printing on standard plotter or laser writers (fig 3).
Once the mask has been fabricated the next step is preparation of the substrate. Novel methods are needed to deposit a uniform coating of photoresist onto the substrate. We have successfully used Electro-Depositable Photoresist (EDPR) with a conducting seed layer to achieve a uniform coating suitable for lithographic patterning.
The next step is to align the (planar) mask and (non-planar) substrate to a high precision in order to correctly expose the pattern. The mask is then illuminated by an ultra-violet laser beam which projects the correct pattern on the substrate (fig 4).
Development, etching and metallisation are then carried out to realise the three dimensional interconnect circuit.
We have used this process to pattern fine-pitch features over grossly non-planar substrates. For example, a 100 micron line has been created over a 4cm height slope (fig 5). This represents a major extension of the z-dimension in comparison to standard lithography and demonstrates the potential for mass producing three dimensional electronics. We are currently working towards the patterning of equivalent structures at the microelectronics scale.
This work is being supported by the EPSRC in the form of a new grant (ref. EP/C534778/1 and EP/C53476X/1) and a follow-on fund grant (ref. EP/E502989/1). We are currently investigating the viability of a maskless non-planar lithography process based on this method.
Publications arising from this work:
- A. Maiden, R. McWilliam, A. Purvis, S. Johnson, G. L. Williams, N. L. Seed and P. A. Ivey, "Nonplanar photolithography with computer generated holograms", Optics letters, Vol. 30, No. 11, p 1300-1302, 2005.
- Gavin L Williams, Richard McWilliam, Andrew Maiden, Alan Purvis, Peter A Ivey and Nicholas L Seed, "Photolithography on Grossly Non-Planar Substrates", The 7th IEEE CPMT International Conference on High Density Microsystem Design and Packaging and Component Failure Analysis (HDP´05), Shanghai, China, June 27 – 30, 2005.
Purvis A, Maiden A, McWilliam R, Williams G L, Seed NL and Ivey PA, ‘Holographic Lithography’ WO2006021818 Filed 24 August 2004.
Maiden A ‘Lithography in three dimensions using computer generated holograms’ PhD thesis, Durham University, September 2005
Williams GL, Seed NL, Purvis A, Maiden A, McWilliam R and Ivey PA ‘Non-planar interconnect’ Circuit World 31(2) 10-14 2005
- Williams GL ‘Non planar interconnect’ Institute of Mining, Metals and Materials Congress, London, 2004
- Ivey PA, McWilliam R, Maiden A, Williams GL, Purvis A and Seed NL ‘Photolithography on Three Dimensional Substrates’ IEEE 56th Electronic Components and Technology Conference, 283-289, San Diego 2006
This is a collaborative project funded by the EPSRC and was run jointly between the School of Engineering, Durham University and the Department of Electrical and Electronic Engineering, University of Sheffield.
If you have an enquiry about this project, please contact Professor Alan Purvis (firstname.lastname@example.org).
GSKP Design Ltd, Manse Lane, Knaresborough, North Yorkshire . Circuit design and fabrication specialists, with advanced PCB manufacture and assembly facilities.
Holtronic Technologies S.A., 12b Champs-Montants, Marin, Switzerland . Manufacturer of unique holographic lithography equipment.
Xaar Plc., 316 Science Park, Milton Road, Cambridge , manufacturer of special ink jet print heads for wide-format printing.
Rohm and Haas, supplier of chemicals for the semiconductor industry.
 Frère, C., Leseberg, D., Bryngdahl, O., “Computer-generated holograms of three-dimensional objects composed of line segments” Journal of the Optical Society of America A, Vol. 3 No. 5 (1986), pp.726-730.